1. Field of Invention
The present invention relates to fabrication and structures of a semiconductor device, and more particularly to a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) process and a CIS structure.
2. Description of Related Art
The CMOS image sensor is utilized more and more widely in image recording as compared with the charge-coupled device (CCD), for its fabricating process can be easily integrated with a conventional CMOS process lowering the manufacturing cost.
A typical CMOS image sensor includes a PN diode for absorbing incident light to produce charges, and a transfer transistor for transferring the charges. Referring to FIG. 3, in a conventional CIS process, the gate 302 of the transfer transistor is formed on a substrate 300, and a photoresist pattern 304 is formed exposing an area of the substrate 300 predetermined for forming the diode, wherein a portion of the gate 302 is usually exposed to make sure that the area is entirely exposed. Ion implantation 306 is then performed to form the doped region 308 of the diode, wherein the implantation depth is much larger than that in ordinary S/D implantation to reduce the dark current.
However, since the implantation depth is usually larger than the thickness of the gate 302 and a portion of the gate 302 is exposed in the implantation, a shallower doped region 309 is also formed under the gate 302 beside the doped region 308. Thus, the dark current under the gate 302 cannot be decreased effectively.